1. Field of the Invention
The present invention relates to a memory controller, which obtains access to a nonvolatile semiconductor memory based on an instruction from a system. Moreover, the present invention relates to a memory system apparatus on which the nonvolatile semiconductor memory and the memory controller are mounted.
2. Description of the Related Art
A memory controller converts a command, an address and the like, which are supplied from a system, into signals suited to a nonvolatile semiconductor memory, and obtains access to the nonvolatile semiconductor memory instead of the system. For example, a memory controller for controlling a NAND type flash memory (hereinafter also simply referred to as a flash memory) outputs a write command, an address, program data and so on sequentially to a data terminal of the flash memory based on an instruction from the system, during write operation (programming) of data.
The NAND type flash memory is mounted on, for example, a memory card, and is used for file storage. The memory controller for controlling the flash memory is mounted on the memory card. The memory controller determines a bit number of an address to be outputted to the flash memory and the like, according to a total memory capacity of the flash memory which is mounted on the memory card. Namely, interchangeability of the memory card is maintained by the memory controller.
Write operation and read operation to/from the NAND type flash memory are carried out for each page. A size of one page is 512 bytes, irrespective of the memory capacity of the flash memory. Hence, the memory controller outputs the program data, which are received from the system, to the flash memory in a unit of 512 bytes. One write operation to the flash memory (write operation of 512 bytes) requires about 200 xcexcs. For example, in a flash memory of 64M bits, a few seconds are necessary to write data to all memory cells.
As described above, since the page size is fixed irrespective of the memory capacity of the flash memory, the number of pages increases as the memory capacity increases. Therefore, a write number and a write time of the data have the tendency to increase as the memory capacity increases. It is considered that the page size will increase in future in order to reduce the write number and shorten the write time.
When a flash memory with a large page size is developed and mounted on the memory card, it is necessary for this memory card to be used in an existing system. Specifically, an input/output interface of the memory card with the large page size needs to correspond to an input/output interface of an existing memory card, so as to maintain interchangeability. In order to respond to this need, it is necessary to develop a new memory controller. However, the memory controller for using by the existing system the memory card on which the flash memory with the large page size is mounted has not been developed.
It is an object of the present invention to provide a memory controller and a memory system apparatus, which can be used by an existing system even when a page size of a flash memory increases.
According to one of the aspects of the present invention, a memory controller controls a nonvolatile semiconductor memory including a plurality of pages having memory cells and a page buffer. The page buffer temporarily holds program data to be programmed to the pages. A data buffer of the memory controller receives first program data whose size is smaller than the size of the page buffer from a system, and holds the received data.
A data adding circuit of the memory controller adds mask data to the first program data to generate second program data whose size is equal to the size of the page buffer. The second program data are outputted to the page buffer. The mask data are the data, which are not programmed to the memory cells of the nonvolatile semiconductor memory. Hence, only the first program data, which are supplied from the system, are programmed to the pages of the nonvolatile semiconductor memory. Namely, even when the program data, which are outputted from the system, are smaller than the size of the page buffer, it is possible to properly program the program data to the nonvolatile semiconductor memory. In other words, even when the size of the page buffer of the nonvolatile semiconductor memory is increased, it is possible to maintain interchangeability with the exiting system only by using the memory controller of the present invention.
According to another aspect of the present invention, an address receiver circuit of the memory controller receives an address signal, which indicates where the first program data is to be stored in the page buffer, from the system. The data adding circuit of the memory controller adds the mask data to at least either a head or an end of the first program data, according to the address signal. Namely, by using the address signal from the system, the data adding circuit can be formed by a simple logic. For example, when the address signal indicates a head of the page buffer, the first program data are stored from the head of the page buffer, and the mask data are stored after the first program data.
According to another aspect of the present invention, an address receiver circuit of the memory controller receives an address signal, which indicates which of the pages is to be programmed the first program data, from the system. A flag generator of the memory controller generates a flag signal, which indicates which memory area in one of the pages is to be programmed the first program data, according to the address signal. The flag signal is programmed into one of a plurality of spare areas corresponding respectively to the pages of the nonvolatile semiconductor memory. Hence, it is possible for the system to recognize the memory area to which the first program data are programmed and to which the first program data are not programmed in the respective pages. Namely, even when the size of the page buffer of the nonvolatile semiconductor memory is increased, the system can easily manage program conditions of the nonvolatile semiconductor memory.